/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
 * Copyright (C) 2016-2018, LomboTech Co.Ltd.
 * Author: lomboswer <lomboswer@lombotech.com>
 *
 * VISS_WB_DMA driver code for LomboTech
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 */

#ifndef VISS_WB_DMA_H_
#define VISS_WB_DMA_H_

#include "viss.h"

#define WB_DMA_DRV_NAME		"viss-wb-dma"
#if defined(CONFIG_ARCH_LOMBO_N7V5) || defined(CONFIG_ARCH_LOMBO_N5V1)
#define		MAX_DATA_PATH	2
#define		MAX_DMA		4
#else
#define		MAX_DATA_PATH	8
#define		MAX_DMA		16
#endif
/* struct dma_dp_data - viss data path structure
 * @dp_number: data path number
 * @plane: data mode
 * @*wb_dma_irq: (vic/mcsi) interrupt function pointer
 * @*priv: point (vic/mcsi) module structure
 * @node: point to next dma_dp_data
 */

struct dp_data {
	u32		dp_id;
	u32		plane;
	int		(*wb_dma_irq)(void *data, u32 intsrc, u32 dp_id);
	void			*priv;
	struct list_head	node;
};


/* struct viss_wb_dma - viss wb_dma structure
 * @*pdev: pointer to VISS device platform device
 * @slock: spinlock protecting this data structure and the hw registers
 * @*regs: memory mapped io registers
 * @irq_queue: interrupt handler waitqueue
 * @dma_flags: dma using tags
 * @head: dma_dp_data header
 */
struct viss_wb_dma {
	struct platform_device		*pdev;

	spinlock_t			slock;

	void __iomem			*regs;
	wait_queue_head_t		irq_queue;

	u16				dma_flags;
	struct list_head		head;
};

/* request wb dma data path */
int wb_dma_req_dp(int (*wb_dma_irq)(void *data, u32 intsrc, u32 dp_id),
		u32 plane, void *priv);

/* unrequest wb dma data path */
int wb_dma_unreq_dp(u32 dp_id, u32 plane);

void wb_dma_set_dp_addr(u32 dp_id, struct viss_addr *paddr,
					u32 plane);

static inline void wb_dma_dp_start(u32 dp_id)
{
	csp_wb_dma_start(dp_id);
}

static inline void wb_dma_dp_stop(u32 dp_id)
{
	csp_wb_dma_stop(dp_id);
}

static inline void wb_dma_dp_reset(u32 dp_id)
{
	csp_wb_dma_reset(dp_id);
}

static inline void wb_dma_dp_data_source(u32 path, u32 src)
{
	csp_wb_dma_data_path_data_source_select(path, src);
}

static inline void wb_dma_dp_clk_source(u32 path, u32 src)
{
	csp_wb_dma_data_path_clock_source_select(path, src);

}

static inline void wb_dma_dp_pro_cfg(u32 path, u32 clear_mask, u32 set_mask)
{
	csp_wb_dma_pro_cfg(path, clear_mask, set_mask);
}

static inline void wb_dma_dp_cap_mode(u32 path, u32 mode)
{
	csp_wb_dma_capture_mode(path, mode);

}

static inline void wb_dma_dp_burst_len(u32 path, u32 length)
{
	csp_wb_dma_burst_length(path, length);
}

static inline void wb_dma_dp_outfmt_mode(u32 path, u32 fmt)
{
	csp_wb_dma_output_format(path, fmt);

}

static inline void wb_dma_dp_offset(u32 path, u32 x, u32 y)
{
	csp_wb_dma_offset(path, x, y);
}

static inline void wb_dma_dp_size(u32 path, u32 x, u32 y)
{
	csp_wb_dma_size(path, x, y);
}

static inline void wb_dma_dp_up_addr(u32 path, u32 mode)
{
	csp_wb_dma_update_cmpt_address(path, mode);

}

static inline void wb_dma_dp_line_stride(u32 path, u32 luma, u32 chroma)
{
	csp_wb_dma_linestride(path, luma, chroma);
}

static inline u32 wb_dma_dp_get_int(u32 path)
{
	return csp_wb_dma_get_int_pd(path);
}

static inline void wb_dma_dp_clear_int(u32 path, u32 pd_mask)
{
	csp_wb_dma_clear_pd(path, pd_mask);
}

static inline void wb_dma_dp_clear_set_ints(u32 path, u32 clear_mask,
						u32 set_mask)
{
	csp_wb_dma_clear_set_ints(path, clear_mask, set_mask);
}
#ifdef CONFIG_ARCH_LOMBO_N7V3
static inline void wb_dma_dp_set_mir_flip(u32 path, u32 dma_mir_flip)
{
	csp_wb_dma_set_mir_flip(path, dma_mir_flip);
}
#endif

#endif /* VISS_WB_DMA_H_ */
